497 lines
25 KiB
C
Executable File
497 lines
25 KiB
C
Executable File
/* --COPYRIGHT--,BSD
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* Copyright (c) 2016, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* --/COPYRIGHT--*/
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//*****************************************************************************
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//
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// rom_driverlib_fr253x_fr263x.h - Macros to facilitate calling functions in
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// ROM for MSP430FR2532, FR2533, FR2632, FR2633
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//
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// Copyright (c) 2014-2017 Texas Instruments Incorporated. All rights reserved.
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// TI Information - Selective Disclosure
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//
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//*****************************************************************************
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//
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#ifndef __ROM_DRIVERLIB_H__
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#define __ROM_DRIVERLIB_H__
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#if (defined(__TI_COMPILER_VERSION__) && !defined(__LARGE_CODE_MODEL__)) || \
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(defined(__IAR_SYSTEMS_ICC__) && (__CODE_MODEL__==__CODE_MODEL_SMALL__))
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//*****************************************************************************
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//
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// Pointers to the main API tables.
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//
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//*****************************************************************************
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#define ROM_DRIVERLIB_APITABLE ((uint16_t *)0x67E0)
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#define ROM_DRIVERLIB_VERSIONL (ROM_DRIVERLIB_APITABLE[0])
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#define ROM_DRIVERLIB_VERSIONH (ROM_DRIVERLIB_APITABLE[1])
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#define ROM_EUSCIASPITABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[2]))
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#define ROM_EUSCIAUARTTABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[3]))
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#define ROM_EUSCIBI2CTABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[4]))
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#define ROM_EUSCIBSPITABLE ((uint16_t *)(ROM_DRIVERLIB_APITABLE[5]))
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#define ROM_DRIVERLIB_getVersion() ((uint32_t)ROM_DRIVERLIB_VERSIONH<<16|\
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ROM_DRIVERLIB_VERSIONL)
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//*****************************************************************************
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//
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// Macros for calling ROM functions in the EUSCIASPI API.
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//
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//*****************************************************************************
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_disableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIASPITABLE[0])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_disable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[1])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_isBusy \
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((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[2])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_getReceiveBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[3])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_enableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIASPITABLE[4])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_transmitData \
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((void (*)(uint16_t baseAddress, \
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uint8_t transmitData))ROM_EUSCIASPITABLE[5])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_changeMasterClock \
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((void (*)(uint16_t baseAddress, \
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EUSCI_A_SPI_changeMasterClockParam *param))ROM_EUSCIASPITABLE[6])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_initMaster \
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((void (*)(uint16_t baseAddress, \
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EUSCI_A_SPI_initMasterParam *param))ROM_EUSCIASPITABLE[7])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_changeClockPhasePolarity \
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((void (*)(uint16_t baseAddress, \
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uint16_t clockPhase, \
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uint16_t clockPolarity))ROM_EUSCIASPITABLE[8])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_getInterruptStatus \
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((uint8_t (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIASPITABLE[9])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_select4PinFunctionality \
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((void (*)(uint16_t baseAddress, \
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uint8_t select4PinFunctionality))ROM_EUSCIASPITABLE[10])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_initSlave \
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((void (*)(uint16_t baseAddress, \
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EUSCI_A_SPI_initSlaveParam *param))ROM_EUSCIASPITABLE[11])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_enable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[12])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_getTransmitBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[13])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_clearInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIASPITABLE[14])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_SPI_receiveData \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIASPITABLE[15])
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#endif
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//*****************************************************************************
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//
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// Macros for calling ROM functions in the EUSCIAUART API.
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//
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//*****************************************************************************
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_setDormant \
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((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[0])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_getTransmitBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[1])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_disableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIAUARTTABLE[2])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_enable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[3])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_transmitData \
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((void (*)(uint16_t baseAddress, \
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uint8_t transmitData))ROM_EUSCIAUARTTABLE[4])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_transmitBreak \
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((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[5])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_resetDormant \
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((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[6])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_init \
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((bool (*)(uint16_t baseAddress, \
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EUSCI_A_UART_initParam *param))ROM_EUSCIAUARTTABLE[7])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_clearInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIAUARTTABLE[8])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_transmitAddress \
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((void (*)(uint16_t baseAddress, \
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uint8_t transmitAddress))ROM_EUSCIAUARTTABLE[9])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_receiveData \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[10])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_enableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIAUARTTABLE[11])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_queryStatusFlags \
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((uint8_t (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIAUARTTABLE[12])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_getReceiveBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[13])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_getInterruptStatus \
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((uint8_t (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIAUARTTABLE[14])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_selectDeglitchTime \
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((void (*)(uint16_t baseAddress, \
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uint16_t deglitchTime))ROM_EUSCIAUARTTABLE[15])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_A_UART_disable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIAUARTTABLE[16])
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#endif
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//*****************************************************************************
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//
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// Macros for calling ROM functions in the EUSCIBI2C API.
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//
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//*****************************************************************************
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_initSlave \
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((void (*)(uint16_t baseAddress, \
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EUSCI_B_I2C_initSlaveParam *param))ROM_EUSCIBI2CTABLE[0])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteStop \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[1])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_isBusBusy \
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((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[2])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveMultiByteNext \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[3])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteStartWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint8_t txData, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[4])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendStart \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[5])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_disableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint16_t mask))ROM_EUSCIBI2CTABLE[6])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_initMaster \
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((void (*)(uint16_t baseAddress, \
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EUSCI_B_I2C_initMasterParam *param))ROM_EUSCIBI2CTABLE[7])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_clearInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint16_t mask))ROM_EUSCIBI2CTABLE[8])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_getTransmitBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[9])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveMultiByteFinishWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint8_t *txData, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[10])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveSingleByte \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[11])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_setSlaveAddress \
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((void (*)(uint16_t baseAddress, \
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uint8_t slaveAddress))ROM_EUSCIBI2CTABLE[12])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_slaveGetData \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[13])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendSingleByte \
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((void (*)(uint16_t baseAddress, \
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uint8_t txData))ROM_EUSCIBI2CTABLE[14])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteFinish \
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((void (*)(uint16_t baseAddress, \
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uint8_t txData))ROM_EUSCIBI2CTABLE[15])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_setMode \
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((void (*)(uint16_t baseAddress, \
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uint8_t mode))ROM_EUSCIBI2CTABLE[16])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_enable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[17])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteNext \
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((void (*)(uint16_t baseAddress, \
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uint8_t txData))ROM_EUSCIBI2CTABLE[18])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_getMode \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[19])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveSingle \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[20])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_disable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[21])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_enableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint16_t mask))ROM_EUSCIBI2CTABLE[22])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteNextWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint8_t txData, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[23])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendSingleByteWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint8_t txData, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[24])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_slavePutData \
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((void (*)(uint16_t baseAddress, \
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uint8_t transmitData))ROM_EUSCIBI2CTABLE[25])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveStart \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[26])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_getReceiveBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[27])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_disableMultiMasterMode \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[28])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveMultiByteFinish \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[29])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterIsStartSent \
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((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[30])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_enableMultiMasterMode \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[31])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteStart \
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((void (*)(uint16_t baseAddress, \
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uint8_t txData))ROM_EUSCIBI2CTABLE[32])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteStopWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[33])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterSendMultiByteFinishWithTimeout \
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((bool (*)(uint16_t baseAddress, \
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uint8_t txData, \
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uint32_t timeout))ROM_EUSCIBI2CTABLE[34])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterIsStopSent \
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((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[35])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_masterReceiveMultiByteStop \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBI2CTABLE[36])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_I2C_getInterruptStatus \
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((uint16_t (*)(uint16_t baseAddress, \
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uint16_t mask))ROM_EUSCIBI2CTABLE[37])
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#endif
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//*****************************************************************************
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//
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// Macros for calling ROM functions in the EUSCIBSPI API.
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//
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//*****************************************************************************
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_enableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIBSPITABLE[0])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_disable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[1])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_clearInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIBSPITABLE[2])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_isBusy \
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((uint16_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[3])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_getReceiveBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[4])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_changeMasterClock \
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((void (*)(uint16_t baseAddress, \
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EUSCI_B_SPI_changeMasterClockParam *param))ROM_EUSCIBSPITABLE[5])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_transmitData \
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((void (*)(uint16_t baseAddress, \
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uint8_t transmitData))ROM_EUSCIBSPITABLE[6])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_select4PinFunctionality \
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((void (*)(uint16_t baseAddress, \
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uint8_t select4PinFunctionality))ROM_EUSCIBSPITABLE[7])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_initSlave \
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((void (*)(uint16_t baseAddress, \
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EUSCI_B_SPI_initSlaveParam *param))ROM_EUSCIBSPITABLE[8])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_disableInterrupt \
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((void (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIBSPITABLE[9])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_getTransmitBufferAddress \
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((uint32_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[10])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_changeClockPhasePolarity \
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((void (*)(uint16_t baseAddress, \
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uint16_t clockPhase, \
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uint16_t clockPolarity))ROM_EUSCIBSPITABLE[11])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_receiveData \
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((uint8_t (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[12])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_getInterruptStatus \
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|
((uint8_t (*)(uint16_t baseAddress, \
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uint8_t mask))ROM_EUSCIBSPITABLE[13])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_initMaster \
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|
((void (*)(uint16_t baseAddress, \
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EUSCI_B_SPI_initMasterParam *param))ROM_EUSCIBSPITABLE[14])
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#endif
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#if defined(TARGET_IS_MSP430FR2XX_4XX)
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#define ROM_EUSCI_B_SPI_enable \
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((void (*)(uint16_t baseAddress))ROM_EUSCIBSPITABLE[15])
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#endif
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#else
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#error "Large code model is not supported"
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#endif
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#endif // __ROM_DRIVERLIB_H__
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