245 lines
8.4 KiB
C
Executable File
245 lines
8.4 KiB
C
Executable File
/* --COPYRIGHT--,BSD
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* Copyright (c) 2016, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* --/COPYRIGHT--*/
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//*****************************************************************************
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//
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// adc.c - Driver for the adc Module.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup adc_api adc
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//! @{
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//
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//*****************************************************************************
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#include "inc/hw_memmap.h"
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#ifdef __MSP430_HAS_ADC__
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#include "adc.h"
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#include <assert.h>
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void ADC_init(uint16_t baseAddress,
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uint16_t sampleHoldSignalSourceSelect,
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uint8_t clockSourceSelect,
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uint16_t clockSourceDivider)
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{
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//Turn OFF ADC Module & Clear Interrupt Registers
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HWREG16(baseAddress + OFS_ADCCTL0) &= ~(ADCON + ADCENC + ADCSC);
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HWREG16(baseAddress + OFS_ADCIE) &= 0x0000; //Reset ALL interrupt enables
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HWREG16(baseAddress + OFS_ADCIFG) &= 0x0000; //Reset ALL interrupt flags
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//Set ADC Control 1
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HWREG16(baseAddress + OFS_ADCCTL1) = sampleHoldSignalSourceSelect //Setup the Sample-and-Hold Source
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+ (clockSourceDivider & ADCDIV_7) //Set Clock Divider
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+ clockSourceSelect; //Setup Clock Source
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//Set ADC Control 2
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HWREG16(baseAddress + OFS_ADCCTL2) = (clockSourceDivider & ADCPDIV_3) //Set Clock Pre-Divider
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+ ADCRES_1; //Default resolution to 10-bits
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}
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void ADC_enable(uint16_t baseAddress)
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{
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//Reset the ADCON bit to enable the ADC Module
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HWREG16(baseAddress + OFS_ADCCTL0) |= ADCON;
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}
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void ADC_disable(uint16_t baseAddress)
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{
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//Set the ADCON bit to disable the ADC Module
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HWREG16(baseAddress + OFS_ADCCTL0) &= ~ADCON;
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}
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void ADC_setupSamplingTimer(uint16_t baseAddress,
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uint16_t clockCycleHoldCount,
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uint16_t multipleSamplesEnabled)
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{
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HWREG16(baseAddress + OFS_ADCCTL1) |= ADCSHP;
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//Reset and Set CB Control 0 Bits
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HWREG16(baseAddress + OFS_ADCCTL0) &= ~(ADCSHT_15 + ADCMSC);
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HWREG16(baseAddress +
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OFS_ADCCTL0) |= clockCycleHoldCount + multipleSamplesEnabled;
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}
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void ADC_disableSamplingTimer(uint16_t baseAddress)
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{
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HWREG16(baseAddress + OFS_ADCCTL1) &= ~(ADCSHP);
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}
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void ADC_configureMemory(uint16_t baseAddress,
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uint8_t inputSourceSelect,
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uint8_t positiveRefVoltageSourceSelect,
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uint8_t negativeRefVoltageSourceSelect)
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{
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//Make sure the ENC bit is cleared before configuring a Memory Buffer Control
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assert(!(HWREG16(baseAddress + OFS_ADCCTL0) & ADCENC));
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if(!(HWREG16(baseAddress + OFS_ADCCTL0) & ADCENC))
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{
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#ifdef ADCPCTL9
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//Enable ADC input pin
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if(inputSourceSelect < ADCINCH_10)
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{
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HWREG16(SYS_BASE + OFS_SYSCFG2) |= (1 << inputSourceSelect);
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}
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#elif ADCPCTL7
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if(inputSourceSelect < ADCINCH_8)
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{
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HWREG16(SYS_BASE + OFS_SYSCFG2) |= (1 << inputSourceSelect);
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}
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#endif
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//Reset and Set the Memory Buffer Control Bits
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HWREG16(baseAddress +
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OFS_ADCMCTL0) = inputSourceSelect +
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positiveRefVoltageSourceSelect
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+ negativeRefVoltageSourceSelect;
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}
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}
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void ADC_enableInterrupt(uint16_t baseAddress,
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uint8_t interruptMask)
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{
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HWREG16(baseAddress + OFS_ADCIE) |= interruptMask;
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}
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void ADC_disableInterrupt(uint16_t baseAddress,
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uint8_t interruptMask)
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{
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HWREG16(baseAddress + OFS_ADCIE) &= ~(interruptMask);
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}
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void ADC_clearInterrupt(uint16_t baseAddress,
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uint8_t interruptFlagMask)
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{
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HWREG16(baseAddress + OFS_ADCIFG) &= ~(interruptFlagMask);
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}
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uint8_t ADC_getInterruptStatus(uint16_t baseAddress,
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uint8_t interruptFlagMask)
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{
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return (HWREG16(baseAddress + OFS_ADCIFG) & interruptFlagMask);
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}
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void ADC_startConversion(uint16_t baseAddress,
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uint8_t conversionSequenceModeSelect)
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{
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//Reset the ENC bit to set the conversion mode sequence
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HWREG16(baseAddress + OFS_ADCCTL0) &= ~(ADCENC);
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HWREG16(baseAddress + OFS_ADCCTL1) &= ~ADCCONSEQ;
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HWREG16(baseAddress + OFS_ADCCTL1) |= conversionSequenceModeSelect;
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HWREG16(baseAddress + OFS_ADCCTL0) |= ADCENC | ADCSC;
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}
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void ADC_disableConversions(uint16_t baseAddress,
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bool preempt)
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{
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if(!preempt)
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{
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if(!(HWREG16(baseAddress + OFS_ADCCTL1) & ADCCONSEQ_3))
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{
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//To prevent preemption of a single-channel, single-conversion we must
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//wait for the ADC core to finish the conversion.
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while(HWREG16(baseAddress + OFS_ADCCTL1) & ADCBUSY)
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{
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;
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}
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}
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}
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HWREG16(baseAddress + OFS_ADCCTL0) &= ~(ADCENC);
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HWREG16(baseAddress + OFS_ADCCTL1) &= ~(ADCCONSEQ_3);
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}
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int16_t ADC_getResults(uint16_t baseAddress)
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{
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return((int16_t)(HWREG16(baseAddress + OFS_ADCMEM0)));
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}
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void ADC_setResolution(uint16_t baseAddress,
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uint8_t resolutionSelect)
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{
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HWREG16(baseAddress + OFS_ADCCTL2) &= ~(ADCRES);
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HWREG16(baseAddress + OFS_ADCCTL2) |= resolutionSelect;
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}
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void ADC_setSampleHoldSignalInversion(uint16_t baseAddress,
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uint16_t invertedSignal)
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{
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HWREG16(baseAddress + OFS_ADCCTL1) &= ~(ADCISSH);
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HWREG16(baseAddress + OFS_ADCCTL1) |= invertedSignal;
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}
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void ADC_setDataReadBackFormat(uint16_t baseAddress,
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uint16_t readBackFormat)
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{
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HWREG16(baseAddress + OFS_ADCCTL2) &= ~(ADCDF);
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HWREG16(baseAddress + OFS_ADCCTL2) |= readBackFormat;
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}
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void ADC_setReferenceBufferSamplingRate(uint16_t baseAddress,
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uint16_t samplingRateSelect)
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{
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HWREG16(baseAddress + OFS_ADCCTL2) &= ~(ADCSR);
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HWREG16(baseAddress + OFS_ADCCTL2) |= samplingRateSelect;
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}
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void ADC_setWindowComp(uint16_t baseAddress,
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uint16_t highThreshold,
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uint16_t lowThreshold)
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{
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HWREG16(baseAddress + OFS_ADCHI) = highThreshold;
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HWREG16(baseAddress + OFS_ADCLO) = lowThreshold;
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}
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uint32_t ADC_getMemoryAddressForDMA(uint16_t baseAddress)
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{
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return (baseAddress + OFS_ADCMEM0);
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}
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uint8_t ADC_isBusy(uint16_t baseAddress)
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{
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return (HWREG16(baseAddress + OFS_ADCCTL1) & ADCBUSY);
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}
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#endif
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//*****************************************************************************
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//
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//! Close the doxygen group for adc_api
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//! @}
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//
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//*****************************************************************************
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